Asic Design In The Silicon Sandbox / Edition 1

by Keith Barr

Overview

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Discover How to Design, Build, and Optimize Customized Mixed-Signal Integrated Circuits for a Wide Variety of Uses

Both inspirational and practical, ASIC Design in the Silicon Sandbox offers electronics engineers a hands-on guide to mixed-signal circuits and layouts. The book provides a detailed roadmap for designing and building custom circuits that are optimized for target devices, providing enhanced functionality and lowered cost in finished products.

Written by circuit design expert Keith Elliott Barr, this complete resource covers everything from design and optimization methods to standard cell layouts to packaging and testing. Readers will find easy-to-apply information on peripheral circuits; specialty logic structures and memory; logic, binary mathematics, and processing; converters and switched-capacitor techniques; and much more. Filled with hundreds of helpful illustrations, ASIC Design in the Silicon Sandbox features:

• A wealth of full-color standard cell layouts
• Multiple approaches to amplifier, oscillator, bandgap, and other analog functions
• Down-to-earth information on integrated circuit fabrication costs
• Real-world advice on designing and optimizing custom integrated circuits
• Practical examples of how to think through new design concepts
• Step-by-step guidance on entering the fabless semiconductor industry

Inside This Cutting-Edge IC Design Reference

• The Sandbox • Fabs and Processes • Economics • Design Tools • Standard Cell Design • Peripheral Circuits • Specialty Logic Structures and Memory • Logic, Binary Mathematics, and Processing • Analog Circuits: Amplifiers • The Bandgap Reference • Oscillators, Phase Locked Loops, and RF • Converts and Switched-Capacitor Techniques • Packaging and Testing • Odds and Ends

Product Details

ISBN-13:	9780071481618
Publisher:	McGraw Hill LLC
Publication date:	12/01/2006
Pages:	390
Product dimensions:	6.20(w) x 9.10(h) x 1.09(d)

About the Author

Keith Barr has founded two successful companies, which were both engaged in the design, manufacture, and international sales of electronic equipment for the music industry.

Table of Contents

Foreword     xiii
Introduction     xv
The Sandbox     1
IC Overview     1
A Peak Under the Hood     2
The Basic Process     4
Masks     10
CMOS Layers     11
Process Enhancements     12
A Completely Different Scale     13
The Available Parts     15
The MOS transistor     15
SPICE Modelling     17
Limitations     19
The Good Part     22
Fabs and Processes     29
Different Fabs, Different Missions     30
Prototyping Services     32
Mosis     33
Europractice     34
The High Cost of High Technology     34
Practical Sandbox Technologies     36
Mature process variations     36
Economics     41
Device Overhead and Yield     43
Examples of Economy, the 10K Gate Level     46
The 100K Gate Level     48
The Million Gate Level     49
Test and Wafer Probe     52
Small Production Runs     53
A Final Word on MLM     54
Wafer Pricing     55
Design Tools and Time     56
Design Tools     57
The Schematic Tool     59
The Layout Tool     60
General layout setup     62
Design Rule Checking (DRC)     65
Extract     68
Layout vs. Schematic (LVS)     72
The SPICE Tool     72
The Logic Simulator     75
Place and Route Tools     76
Logic Synthesis Tools     77
Standard Cell Design     81
The Sandbox Rule Set     82
Organization of the Design Rules     83
Drawn and Derived Layers     85
Simple Cells     86
Standard Cell Design Issues     87
Fanout and device sizing     92
Fitting Cells into a Constant Rail Height     93
Autoroute Considerations     94
The Standard Cell Library     96
Standard Cell Propagation Delay     102
Verilog Models     105
Peripheral Circuits     111
Bulk and Sheet Resistivity     112
Insulator Dielectric Constant     114
Semiconductors     115
Diode Junctions     117
Zener Diodes      117
Bipolar Transistors     118
The MOSFET     119
Electrostatic Discharge     120
Bonding Pads and the Seal Ring     121
Protection Devices     124
Latchup     126
Lateral Bipolar Devices     127
The Snapback Phenomenon     128
Minority Carrier Injection to the Substrate     130
Supply Clamping and Supply Rail Conductivity     131
Protected Pad Design     132
Low RFI Pad Design     134
Specialty Logic Structures and Memory     137
Custom Memories     139
The Memory Core: SRAM     140
The Memory I/O Section     143
The Wordline Decoder     146
The Control "Corner"     150
Read Only Memories (ROM)     152
Dynamic Memory (DRAM)     155
The Differential DRAM     155
Sense amp statistical offsets     160
Soft errors     162
DRAM Timing     162
Leakage currents and storage time     163
Other Memories     166
Experimental NonVolatile Structures     167
Logic, Binary Mathematics, and Processing     171
A Logic Primer      171
Shift Registers     178
Clock Synchronization     179
Counters     180
Binary Numbering Systems     184
Saturation Limiting     186
Look-Ahead Carry Generation     188
Multipliers     189
Digital Filtering     190
FIR Filters     191
Interpolators and decimators     193
IIR Filters     194
Processing Machinery     199
The Binary Point     200
Simple Auxiliary Processing Circuits     202
Floating point     202
LOG and EXP     204
Phase and frequency     204
Phase detectors     206
Synchronization     207
Waveform Generation     207
Pseudorandom Noise     208
Serial Interfaces     209
Modulation Coding     210
PWM Output Circuits     212
Digital Hysteresis     214
Analog Circuit Introduction and Amplifiers     217
The MOSFET Regions of Operation     217
The subthreshold region     218
The saturation region     221
The linear region     223
The Body Effect     224
Capacitance of MOS Structures     224
Gate capacitance     225
Temperature Effects     226
Current Sources and Sinks     227
Current scaling     230
Bias Sources     232
CMOS Amplifiers     234
Differential amplifiers     237
The current mirror amplifier     245
The folded cascade amplifier     248
Device Sizing, a Current Density Approach     249
MOSFET Noise     252
Device sizing with noise in mind     255
Closed-Loop Stability     256
A simplified approach to compensation     261
Driving Resistive Loads     262
A high output current, low bias amplifier     262
Wideband Amplifiers     264
The Bandgap Reference     267
Bandgap Design #1-Basic Principle     270
Bandgap Design #2     271
Bandgap Design #3     274
Bandgap Design #4     276
The Half Bandgap     280
A Bandgap Supply Regulator     281
A Temperature Sensor     284
Oscillators, Phase Locked Loops, and RF Introduction     287
LC Oscillators      287
RC Oscillators     288
Crystal oscillators     292
Phase-Locked Loops     295
PLL Precautions     302
RF Local Oscillators and Predividers     304
Quad Circuits and Mixers     308
Converters and Switched Capacitor Techniques     313
The Ladder DAC     313
Resistor matching     316
ADCs     318
Successive approximation ADC     318
Flash conversion     321
Low rate ADCs     324
Averaging converters     326
Switched Capacitor Converters     330
Differential switched capacitor structures     333
High-ordered delta-sigma converters     339
Switched capacitor noise     346
Oversampled converter post processing     348
More clock phases     349
Packaging and Testing     351
Prototype Packaging and First Silicon     358
Production Testing     360
Test Vectors     362
Odds and Ends     363
The MID Supply     367
Substrate Connections and Sensitive Circuity     368
Power-Up Circuits     369
The Schmitt Trigger      370
Testing the ASIC in Production     371
Sensors     373
Optical sensors     374
CMOS cameras     376
Hall and Strain Sensors     377
Supply-Boost Circuits     379
My Circuits, Your Circuits     381
Parting Thoughts     381
Index     385