Boundary-Scan Interconnect Diagnosis / Edition 1

by Josï T. de Sousa, Peter Y.K. Cheung

Overview

Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores.
Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution. The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.

Product Details

ISBN-13:	9781441948878
Publisher:	Springer US
Publication date:	12/07/2010
Series:	Frontiers in Electronic Testing , #18
Edition description:	Softcover reprint of the original 1st ed. 2001
Pages:	168
Product dimensions:	6.10(w) x 9.25(h) x 0.02(d)

Table of Contents

Interconnect Circuit and Fault Models.- Behavioral Interconnect Diagnosis.- Structural Interconnect Diagnosis.- Diagnostic Resolution Assessment.- Experimental Results.- Conclusion.

Editorial Reviews

Cheung (electronic engineering, U. of London) and de Sousa (electrical engineering, Technical U. of Lisbon) explain how to synthesize digital diagnostic sequences for wire interconnects using boundary scan and how to assess the quality of those scans. There are methods for testing pre-designed cores that enable significant optimizations of test vector length and diagnostic resolution. The authors survey existing methods and propose a new one. In the new approach, circuit and interconnect faults are modeled and graph techniques are used to solve the problem. Annotation c. Book News, Inc., Portland, OR (booknews.com)

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