Influence of Temperature on Microelectronics and System Reliability: A Physics of Failure Approach / Edition 1

by Pradeep Lall, Michael G. Pecht, Edward B. Hakim

Overview

This book raises the level of understanding of thermal design criteria. It provides the design team with sufficient knowledge to help them evaluate device architecture trade-offs and the effects of operating temperatures. The author provides readers a sound scientific basis for system operation at realistic steady state temperatures without reliability penalties. Higher temperature performance than is commonly recommended is shown to be cost effective in production for life cycle costs.

The microelectronic package considered in the book is assumed to consist of a semiconductor device with first-level interconnects that may be wirebonds, flip-chip, or tape automated bonds; die attach; substrate; substrate attach; case; lid; lid seal; and lead seal. The temperature effects on electrical parameters of both bipolar and MOSFET devices are discussed, and models quantifying the temperature effects on package elements are identified. Temperature-related models have been used to derive derating criteria for determining the maximum and minimum allowable temperature stresses for a given microelectronic package architecture.

The first chapter outlines problems with some of the current modeling strategies. The next two chapters present microelectronic device failure mechanisms in terms of their dependence on steady state temperature, temperature cycle, temperature gradient, and rate of change of temperature at the chip and package level. Physics-of-failure based models used to characterize these failure mechanisms are identified and the variabilities in temperature dependence of each of the failure mechanisms are characterized. Chapters 4 and 5 describe the effects of temperature on the performance characteristics of MOS and bipolar devices. Chapter 6 discusses using high-temperature stress screens, including burn-in, for high-reliability applications. The burn-in conditions used by some manufacturers are examined and a physics-of-failure approach is described. The

Product Details

ISBN-13:	9780849394508
Publisher:	Taylor & Francis
Publication date:	04/24/1997
Series:	The Electronic Packaging Series
Edition description:	New Edition
Pages:	328
Product dimensions:	7.00(w) x 10.00(h) x 0.90(d)

About the Author

Lall, Pradeep; Pecht, Michael; Hakim, Edward B.

Table of Contents

Does the Cooling of Electronics Increase Reliability?
Temperature Dependence of Microelectronic Package Failure Mechanisms
Temperature Dependencies of Failure Mechanisms in the Die Metallization
Effect of Hydrogen (H2) and Helium (He) Ambients On Metallization Versus Temperature
Temperature Dependencies of Failure Mechanisms in the Device Oxide
Temperature Dependencies of Failure Mechanisms in the Device
Temperature Dependencies of Failure Mechanisms in the Device Oxide Interface
Temperature Dependence of Microelectronic Package Failure Mechanisms
Temperature Dependencies of Failure Mechanisms in the Die and Die/Substrate Attach
Temperature Dependencies of Failure Mechanisms in First-Level Interconnections
Temperature Dependencies of Failure Mechanisms in the Package Case
Electrical Parameter Variations in Bipolar Devices
Introduction
Temperature Dependence of Bipolar Junction Transistor Parameters
Electrical Parameter Variations in Mosfet Devices
Temperature Dependence of Mosfet Parameters
A Physics-of-Failure Approach to IC Burn-In
Introduction
Burn-In Philosophy
Problems with Present Approach to Burn-In
A Physics-of-Failure Approach to Burn-In
Derating Guidelines for Temperature-Tolerant Design of Microelectronic Devices
Introduction
Problems with the Present Approach to Device Derating
A Physics-of-Failure Approach to Device Derating
Derating for Failure Mechanisms in Die Metallization
Derating Guidelines for Temperature-Tolerant Design of Electronic Packages
Derating for Failure Mechanisms in the Die and Die/Substrate Attach
Derating for Failure Mechanisms in the First-Level Interconnects
Derating for Failure Mechanisms in the Package Case
A Guide for Steady State Temperature Effects