Table of Contents
Preface ix
The Authors xi
1 Overview of CMP Technology 1
1.1 Motivation and Background 1
1.2 The Key Factors of CMP Process 3
1.2.1 CMP Polishing Machines 3
1.2.2 Slurry for CMP 4
1.2.3 Pad 6
1.2.4 Slurry Supply Equipment and Filtering Equipment 6
2 Interlayer Dielectric CMP 9
2.1 Interlayer Dielectric (ILD) CMP Process 9
2.2 Rheological and Electrokinetic Behavior of Nano Fumed Silica Particle for ILD CMP 9
2.2.1 The Unique Behavior of Concentrated Nano Fumed Silica Hydrosols 10
2.2.2 Electrokinetic Behavior of Nano Silica Hydrosols 11
2.2.3 Geometric Consideration 12
2.3 Particle Engineering for Improvement of CMP Performance 14
2.3.1 Surface Modification of Silica Particle 14
2.3.2 Improvement of ILD CMP with Modified Silica Slurry 16
2.4 PAD Dependency in ILD CMP 17
2.5 ILD Pattern Dependencies 20
2.5.1 CMP Tool Dependency 20
2.5.2 Pattern Density Dependency 25
3 Shallow Trench Isolation CMP 35
3.1 Requirement for High Selectivity Slurry 35
3.2 Particle Engineering of Ceria Nanoparticles and Their Influence on CMP Performance 38
3.2.1 Physical Properties of Ceria Particles 38
3.2.2 STI CMP Performance with Ceria Slurries 39
3.2.3 Influence of Crystalline Structure of Ceria Particles on the Remaining Particles 40
3.3 Chemical Engineering for High Selectivity in STI CMP 45
3.3.1 Electrokinetic Behavior of the Ceria Particle, Oxide, and Nitride Films 46
3.3.2 STI CMP Performance in Different Suspension pH 47
3.3.3 The Conformation of Polymeric Molecules and STI CMP Performance 50
3.4 Force Measurement Using Atomic Force Microscopy for Mechanism 55
3.5 Pattern Dependence of High-Selectivity Slurry 60
4 Copper CMP 79
4.1 Introduction 79
4.2 High Selectivity for Copper CMP 82
4.3 Copper CMP Pattern Dependence 88
4.3.1 Dishing Dependency on Feature Size and Pattern Density 88
4.3.2 Pattern Effects on Planarization Efficiency of Cu Electropolishing 94
4.3.3 Cu Pad Size and Linewidth Affect Dishing 102
4.3.3.1 Pattern Dependence of Dishing and Erosion Phenomena 104
4.3.3.2 TaN Cap Process for Cu Corrosion Prevention and Thermal Stability Improvement 105
5 Nanotopography 111
5.1 What Is Nanotopography? 111
5.2 Why Nanotopography Is Important 113
5.3 Impact of Nanotopography on CMP 114
5.3.1 General Introduction 114
5.3.2 Spectral Analysis of the Impact of Nanotopography on Oxide CMP and Fourier Transform Method 116
5.3.3 Impact of Nanotopography on Silicon Wafer on Oxide CMP 120
5.3.3.1 Watering Method Dependency of Impact of Nanotopography on Oxide CMP 120
5.3.3.2 Slurry Characteristic Dependency of Impact of Nanotopography on Oxide CMP 126
5.3.3.3 Effect of Wafer Nanotopography on Remaining Polysilicon Thickness Variation after Polysilicon CMP 130
5.3.3.4 Effect of VT Variation of Wafer Nanotopography on Remaining Polysilicon Thickness Variation after Polysilicon CMP 131
5.4 Equipment in Measuring the Nanotopography 136
5.4.1 Introduction to General Equipment Used in the Measurement of Nanotopography 136
5.4.1.1 SQM™ (Surface Quality Monitor), from ADE, USA 138
5.4.1.2 NanoMapper, from ADE Phase Shift, USA 139
5.4.1.3 DynaSearch, from Raytex, Japan 141
5.4.1.4 Line Profile Comparison among Three Instruments 143
5.4.1.5 Calibration among the Standard Deviations of Height Change Measured by Three Kinds of Instruments 143
6 Novel CMP for Next-Generation Devices 149
6.1 The Progress of Semiconductor Devices upon Current Demand 149
6.2 Complementary Metal-Oxide Semiconductor (CMOS) Memory 151
6.2.1 Noble Metal CMP for DRAM 152
6.2.2 Poly Si CMP for NAND Flash Memory 154
6.3 Novel CMP for New Memory 163
6.3.1 GST CMP for PRAM 163
6.3.2 Novel CMP for ReRAM 170
References 171
Index 177
