SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors / Edition 1 available in Hardcover, eBook
SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors / Edition 1
- ISBN-10:
- 1118487907
- ISBN-13:
- 9781118487907
- Pub. Date:
- 01/21/2014
- Publisher:
- Wiley
SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors / Edition 1
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Overview
No comprehensive description of the physics and possible applications of the Lubistor can be found in a single source even though the Lubistor is already being used in SOI LSIs. The book provides, for the first time, a comprehensive understanding of the physics of the Lubistor. The author argues that a clear understanding of the fundamental physics of the pn junction is essential to allowing scientists and engineers to propose new devices. Since 2001 IBM has been applying the Lubistor to commercial SOI LSIs (large scale integrated devices) used in PCs and game machines. It is a key device in that it provides electrostatic protection to the LSIs. The book explains the device modeling for such applications, and covers the recent analog circuit application of the voltage reference circuit.
The author also reviews the physics and the modeling of ideal and non-ideal pn junctions through reconsideration of the Shockley’s theory, offering readers an opportunity to study the physics of pn junction. Pn-junction devices are already applied to the optical communication system as the light emitter and the receiver. Alternatively, optical signal modulators are proposed for coupling the Si optical waveguide with the pn-junction injector. The book also explores the photonic crystal physics and device applications of the Lubistor.
- Advanced level consolidation of the technology, physics and design aspects of silicon-on-insulator (SOI) lubistors
- Written by the inventor of the Lubistor, this volume describes the technology for readers to understand the physics and applications of the device
- First book devoted to the Lubistor transistor, presently being utilized in electrostatic discharge (ESD) applications in SOI technology, a growing market for semiconductor devices and advanced technologies
- Approaches the topic in a systematic manner, from physical theory, through to modelling, and finally circuit applications
This is an advanced level book requiring knowledge of electrical and electronics engineering at graduate level.
Contents includes: Concept of Ideal pn Junction/Proposal of Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor)/ Noise Characteristics and Modeling of Lubistor/Negative Conductance Properties in Extremely Thin SOI Lubistors/
Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors/ Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors/
Gate-Controlled Bipolar Action in Ultra-thin Dynamic Threshold SOI MOSFET/Sub-Circuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications/A New Basic Element for Neural Logic Functions and Functionality in Circuit Applications/Possible Implementation of SOI Lubistors into Conventional Logic Circuits/Potentiality of Electro-Optic Modulator Based on SOI Waveguide/Principles of Parameter Extraction/Feasibility of Lubistor-Based Avalanche Photo Transistor
Product Details
ISBN-13: | 9781118487907 |
---|---|
Publisher: | Wiley |
Publication date: | 01/21/2014 |
Series: | IEEE Press |
Pages: | 320 |
Product dimensions: | 6.50(w) x 9.70(h) x 0.80(d) |
About the Author
Table of Contents
Preface xiiiAcknowledgements xv
Introduction to an Exotic Device World xvii
Part One BRIEF REVIEWAND MODERN APPLICATIONS OF PN-JUNCTION DEVICES
1 Concept of an Ideal pn Junction 3
References 4
2 Understanding the Non-ideal pn Junction – Theoretical Reconsideration 7
2.1 Introduction 7
2.2 Bulk pn-Junction Diode 8
2.2.1 Assumptions 8
2.2.2 Model A – Low Doping Case 9
2.2.3 Model B – High Doping Case 18
2.3 Bulk pn-Junction Diode – Reverse Bias 24
2.3.1 Model A – Low Doping Case 24
2.3.2 Model B – High Doping Case 25
2.4 The Insulated-Gate pn Junction of the SOI Lubistor – Forward Bias 32
2.4.1 The Positive Gate Voltage Condition 32
2.4.2 The Negative Gate Voltage Condition 35
2.5 The Insulated-Gate pn Junction of the
SOI Lubistor – Reverse Bias 35
References 37
3 Modern Applications of the pn Junction 39
References 40
Part Two PHYSICS AND MODELING OF SOI LUBISTORS – THICK-FILM DEVICES
4 Proposal of the Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor) 43
4.1 Introduction 43
4.2 Device Structure and Parameters 43
4.3 Discussion of Current–Voltage Characteristics 45
4.4 Summary 47
References 47
5 Experimental Consideration for Modeling of Lubistor Operation 49
5.1 Introduction 49
5.2 Experimental Apparatus 49
5.3 Current–Voltage Characteristics of Lubistors 52
5.4 Lubistor Potential Profiles and Features 56
5.5 Discussion 57
5.5.1 Simplified Analysis of Lubistor Operation 57
5.5.2 On the Design of Lubistors 60
5.6 Summary 61
References 61
6 Modeling of Lubistor Operation Without an EFS Layer for Circuit Simulations 63
6.1 Introduction 63
6.2 Device Structure and Measurement System 63
6.3 Equivalent Circuit Models of an SOI Lubistor 65
6.3.1 Device Simulation 65
6.3.2 Equivalent Circuit Models 68
6.4 Summary 72
References 73
7 Noise Characteristics and Modeling of Lubistor 75
7.1 Introduction 75
7.2 Experiments 75
7.2.1 Device Structure 75
7.2.2 Measurement System 77
7.3 Results and Discussion 77
7.3.1 I–V Characteristics of an SOI Lubistor and a Simple Analytical Model 77
7.3.2 Noise Spectral Density of SOI Lubistors and Their Feature 81
7.3.3 Advanced Analysis of Anode Noise Spectral Density 83
7.4 Summary 86
References 86
8 Supplementary Study on Buried Oxide Characterization 89
8.1 Introduction 89
8.2 Physical Model for the Transition Layer 90
8.3 Capacitance Simulation 93
8.3.1 A Structure to Evaluate Capacitance 93
8.3.2 Numerical Simulation Technique 94
8.4 Device Fabrication 95
8.5 Results and Discussion 96
8.5.1 Electrode-to-Electrode Capacitance Dependence on Frequency 96
8.5.2 Drain-to-Substrate Capacitance Dependence on Bias 98
8.5.3 Electrode-to-Electrode Capacitance Dependence on Transition Layer Thickness 101
8.6 Summary 101
References 102
Part Three PHYSICS AND MODELING OF SOI LUBISTORS – THIN-FILM DEVICES
9 Negative Conductance Properties in Extremely Thin SOI Lubistors 105
9.1 Introduction 105
9.2 Device Fabrication and Measurements 105
9.3 Results and Discussion 106
9.4 Summary 109
References 109
10 Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors 111
10.1 Introduction 111
10.2 Experiments 111
10.2.1 Anode Common Configuration 113
10.2.2 Cathode Common Configuration 113
10.3 Physical Models and Simulations 114
10.3.1 Fundamental Models 114
10.3.2 Theoretical Simulations 118
10.3.3 Influences on Characteristics of Extremely Ultra-Thin SOI MOSFET Devices 122
10.4 Summary 122
Appendix 10A: Intrinsic Carrier Concentration (niq) and the Fermi Level in 2DSS 122
Appendix 10B: Calculation of Electron and Hole Densities in 2DSS 125
References 125
11 Two-Dimensional Quantization Effect on Indirect Tunneling in SOI Lubistors with a Thin Silicon Layer 127
11.1 Introduction 127
11.2 Experimental Results 128
11.2.1 Junction Current Dependence on Anode Voltage 128
11.2.2 Junction Current Dependence on Gate Voltage 132
11.3 Theoretical Discussion 134
11.3.1 Qualitative Consideration of the Low-Dimensional Indirect Tunneling Process 134
11.3.2 Theoretical Formulations of Tunneling Current and Discussion 134
11.4 Summary 140
Appendix 11A: Wave Function Coupling Effect in the Lateral Two-Dimensional-System-to-Three-Dimensional-System (2D-to-3D) Tunneling Process 141
References 141
12 Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors 143
12.1 Introduction 143
12.2 Device Structures and Experimental Apparatus 144
12.3 Results and Discussion 145
12.3.1 I–V Characteristics under the Reverse-Biased Condition 145
12.4 Summary 151
Appendix 12A: Derivation of Equations (12.6) and (12.9) 151
References 153
13 Supplementary Consideration of I-V Characteristics of Forward-Biased Ultra-Thin Lubistors 155
13.1 Introduction 155
13.2 Device Structures and Bias Configuration 155
13.3 Results and Discussion 156
13.4 Summary 157
References 158
14 Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET 159
14.1 Introduction 159
14.2 Device and Experiments 159
14.3 Results and Discussion 159
14.3.1 ID–VG and IG–VG Characteristics of the Ultra-Thin-Body DT-MOSFET 159
14.3.2 Control of Bipolar Action by the MOS Gate 162
14.4 Channel Polarity Dependence of Bipolar Action 162
14.4.1 ID–VG and gm–VG Characteristics of the Ultra-Thin-Body DT-MOSFET 162
14.4.2 Difference of Bipolar Operation between the n-Channel DT-MOS and the p-Channel DT-MOS 163
14.4.3 Impact of Body Thickness on Bipolar Operation 164
14.5 Summary 166
References 166
15 Supplementary Study on Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET 167
15.1 Introduction 167
15.2 Device Structures and Parameters 167
15.3 Results and Discussion 169
15.3.1 SOI MOSFET Mode and DT-MOSFET Mode 169
15.3.2 Temperature Evolution of Transconductance (gm) Characteristics and Impact of Channel Length on gm Characteristics 170
15.3.3 Impact of SOI Layer Thickness on gm Characteristics 173
15.4 Summary 173
References 174
Part Four CIRCUIT APPLICATIONS
16 Subcircuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications 179
16.1 Introduction 179
16.2 Equivalent Circuit Models of SOI Lubistors and their Applications 180
16.2.1 Device Structure and Device Simulation 180
16.2.2 Equivalent Circuit Models 183
16.3 ESD Protection Circuit 183
16.4 Direct Current Characteristics of the ESD Protection Devices and Their SPICE Models 186
16.5 ESD Event and Performance Evaluation of an ESD Protection Circuit 189
16.6 Summary 196
References 196
17 A New Basic Element for Neural Logic Functions and Capability in Circuit Applications 199
17.1 Introduction 199
17.2 Device Structure, Model, and Proposal of a New Logic Element 199
17.2.1 Device Structure and Fundamental Characteristics 199
17.2.2 Device Model for the Lubistor 201
17.2.3 Proposal of a New Logic Element 203
17.3 Circuit Applications and Discussion 206
17.3.1 Examples of Fundamental Elements for Circuit Applications 206
17.3.2 On the Further Improvement of Functions of the Basic Logic Element 211
17.4 Summary 211
References 211
18 Sub-1-V Voltage Reference Circuit Technology as an Analog Circuit Application 213
18.1 Review of Bandgap Reference 213
18.2 Challenging Study of Sub-1-V Voltage Reference 214
References 215
19 Possible Implementation of SOI Lubistors into Conventional Logic Circuits 217
References 218
Part Five OPTICAL DEVICE APPLICATIONS OF SOI LUBISTORS
20 Potentiality of Electro-Optic Modulator Based on the SOI Waveguide 223
20.1 Introduction 223
20.2 Characterization of the Quasi-One-Dimensional Photonic Crystal Waveguide 224
20.3 Electro-Optic Modulator Based on the SOI Waveguide 230
20.4 Summary 233
References 234
Part Six SOI LUBISTOR AS A TESTING TOOL
21 Principles of Parameter Extraction 237
References 239
22 Charge Pumping Technique 241
22.1 Introduction 241
22.2 Experimental and Simulation Details 241
22.3 Results and Discussion 243
22.4 Summary 246
References 246
Part Seven FUTURE PROSPECTS
23 Overview 249
23.1 Introduction 249
23.2 i-MOS Transistor 249
23.3 Tunnel FET 251
23.4 Feedback FET 254
23.5 Potential of Offset-Gate Lubistor 256
23.6 Si Fin LED with a Multi-quantum Well 258
23.7 Future of the pn Junction 258
References 259
24 Feasibility of the Lubistor-Based Avalanche Phototransistor 261
24.1 Introduction 261
24.2 Theoretical Formulation of the Avalanche Phenomenon in Direct-Bandgap Semiconductors 261
24.3 Theoretical Formulation of the Avalanche Phenomenon in Indirect-Bandgap Semiconductors 264
24.4 Theoretical Consideration of the Avalanche Phenomenon in a One-Dimensional Wire pn Junction 265
24.5 Summary 269
References 269
Part Eight SUMMARY OF PHYSICS FOR SEMICONDUCTOR DEVICES AND MATHEMATICS FOR DEVICE ANALYSES
25 Physics of Semiconductor Devices for Analysis 273
25.1 Free Carrier Concentration and the Fermi Level in Semiconductors 273
25.2 Impurity Doping in Semiconductors 275
25.3 Drift and Diffusion of Carriers and Current Continuity in Semiconductors 275
25.4 Stationary-State Schrödinger Equation to Analyze Quantum-Mechanical Effects in Semiconductors 276
25.5 Time-dependent Schrödinger Equation to Analyze Dynamics in Semiconductors 277
25.6 Quantum Size Effects in Nano-Scale Semiconductors 278
25.7 Tunneling through Energy Barriers in Semiconductors 281
25.8 Low-Dimensional Tunneling in Nano-Scale Semiconductors 282
25.9 Photon Absorption and Electronic Transitions 284
25.9.1 Fundamental Formulations 284
25.9.2 Interband Transition – Direct Bandgap 285
25.9.3 Interband Transition – Indirect Bandgap 286
References 287
26 Mathematics Applicable to the Analysis of Device Physics 289
26.1 Linear Differential Equation 289
26.2 Operator Method 290
26.3 Klein–Gordon-Type Differential Equation 291
References 292
Bibliography 293
Index 295