The Verilog® Hardware Description Language / Edition 5

by Donald Thomas, Philip Moorby

Overview

XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("

Product Details

ISBN-13:	9780387849300
Publisher:	Springer US
Publication date:	10/08/2008
Edition description:	5th ed. 2002
Pages:	386
Product dimensions:	6.00(w) x 9.10(h) x 0.90(d)

Table of Contents

Verilog – A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.