Table of Contents
1 Introduction 1
References 6
2 Bio-Signal Interface Amplifiers: An Introduction 9
2.1 Characteristics of the Recording Electrodes 9
2.2 Characteristics of Bio-Signals 11
2.2.1 Brain Recordings 11
2.2.2 Muscle-Based Signals 12
2.3 Noise/Power Tradeoff 12
2.3.1 Flicker Noise, 1/f Noise 12
2.3.2 Thermal Noise 13
2.4 Representative Prior Art 13
References 14
3 A Low-Power, Low-Noise, Open-Loop Amplifier for Neural Recording 15
3.1 Open-Loop Amplifier Design 15
3.2 Results 17
3.3 Effect of Non-Linearity on Neural Recordings 20
3.4 Conclusions 23
References 23
4 Closed-Loop Neural Recording Amplifier Design Techniques 25
4.1 Design of a Closed-Loop Telescopic Amplifier 25
4.1.1 Closed-Loop Architecture 25
4.1.2 Analysis of Pseudo-Resistors 26
4.1.3 Telescopic OTA Design Overview 27
4.1.4 Design Optimization 28
4.1.5 Stability and Common-Mode Feedback 29
4.2 Design of a Closed-Loop Complementary-Input Amplifier 30
4.2.1 Design of an Closed-Loop Fully-Differential Complementary-Input Amplifier 30
4.3 Design of a Variable-Gain Amplifier 33
References 35
5 Closed-Loop Bio-Signal Amplifiers: Experimental Results 37
5.1 Amplifier Testing 37
5.2 Variable Gain Amplifier (VGA) Testing 39
5.3 In-Vivo Testing 41
References 43
6 Design and Implementation of Chopper-Stabilized Amplifiers 45
6.1 Chopper-Stabilization Technique 45
6.1.1 Open-Loop Operation Principle 45
6.1.2 Closed-Loop Operation Principle 46
6.2 Design of a Chopper-Stabilized Amplifier 46
6.3 Hardware Implementation 48
6.3.1 Transfer Function 48
6.3.2 Amplifier Noise 49
References 49
7 Spike Detection and Characterization 51
7.1 The Spike Detection Task 51
7.2 Spike Detection Techniques 53
7.3 Analog and Mixed-Mode Computation 54
7.4 System Design 55
7.4.1 Spike Detector 56
7.4.2 Feature Extraction 57
7.4.3 Analog-Digital Converter 58
7.5 Results 59
References 62
8 Spike Sorting 65
8.1 Overview 65
8.2 K-Means Clustering Algorithm 67
8.3 Hardware Considerations for Analog On-Line Clustering 69
8.3.1 On-Line Median Learning 69
8.3.2 Non-Ideal Computational Elements 71
8.3.3 Asymmetric Updates 72
References 74
9 Analog Clustering Circuit 75
9.1 Floating-Gate Memories 75
9.2 Device Characterization 76
9.3 Circuit Design 79
9.3.1 Clustering Circuit 79
9.3.2 Floating-Gate Memory Cell 81
9.3.3 Decision Circuit 83
9.4 Experimental Results 85
9.4.1 Update Rates 85
9.4.2 Memory Cell Retention 87
9.4.3 Classification 88
9.4.4 Clustering Convergence 90
9.5 Discussion 93
References 96
10 NeuralWISP: A Wirelessly Powered Spike Density Recording System 97
10.1 Previous Neural Recording Systems 97
10.2 System Design 99
10.2.1 Analog Signal Path 100
10.2.2 Digital Control 103
10.3 Test Results 103
10.4 Experimental Results 107
10.5 Conclusions 108
References 109
11 A 500 μW Wireles Neural Streaming System 111
11.1 Analog Front End 111
11.2 Conversion and Control 112
11.3 MICS-band Wireless Transmitter 113
11.4 Results 113
References 115
12 Conclusions 117
References 118
Index 119
