VHDL:Modular Design and Synthesis of Cores and Systems, Third Edition / Edition 3

by Zainalabedin Navabi

Overview

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Utilize the Latest VHDL Tools and Techniques for Desigining Embedded Cores, Cutting-Edge Processors, RT Level Components, and Complex Digital Systems

Considered and industry classis, VHDL:Modular Design and Synthesis of Cores and Systems has been fully updated to cover methodologies of modern design and the latest uses of VHDL for digital system design. You'll learn how to utilize VHDL to create specific constructs for specific hardware parts, focusing on VHDL's new libraries and packages.

The cutting-edge resource explores the design of RT level components, the application of these components in a core-based, and the development of a complete processor design with its hardware and software as a core in a system-on-a-chip(SOC). Filled with over 150 illustrations, VHDL:Modular Design and Synthesis of Cores and Systems features:

An entire toolkit for register-transfer level digital system design

Testbench development techniques

New to this edition: Coverage of the latest uses of VHDL for digital system design, design of IP cores, interactive and self-checking testbench development, and VHDL's new libraries and packages

Inside this State-of-the-Art VHDL Design Tool

Design Methodology

VHDL Overview

Structure of VHDL

Simulation Model

Combinational Circuits

Sequential Circuits

Testbench Development

Control-Data Partitioned Designs

Design of RTL Embedded Cores

CPU RT Level Design

CPU Memory Indtruction Level Testing

Software Tools

Embedded System Design

Product Details

ISBN-13:	9780071475457
Publisher:	McGraw-Hill Professional Publishing
Publication date:	04/06/2007
Edition description:	Revised
Pages:	531
Product dimensions:	6.40(w) x 9.30(h) x 1.40(d)

About the Author

Zainalabedin Navabi, Ph.D., [e-mail], is adjunct professor of electrical and computer engineering at Northeastern University and the author of both editions of VDHL: Analysis and Modeling of Digital Systems, published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system automation. He has served as a consultant for several EDA companies developing HDL based tools and environments. Dr. Navabi is a member of ACM, IEEE, IEEE computer society, and an active participant in IEEE DASC committee that sets standards related to hardware description languages

Table of Contents

Preface
Introduction
Acknowledgments

Chapter 1: Digital System Design Automation with VHDL

Chapter 2: RTL with VHDL

Chapter 3: VHDL Constructs for Structure and Hierarchy Descriptions

Chapter 4: Concurrent Constructs for RT Level Descriptions

Chapter 5: Sequential Constructs for RT Level Descriptions

Chapter 6: VHDL Language Utilities and Packages

Chapter 7: VHDL Signal Model

Chapter 8: Hardware Cores and Models

Chapter 9: Core Design and Testability

Chapter 10: Design, Test and Application of a Processor Core
APPENDIX A: VHDL KEYWORDS
APPENDIX B: VHDL LANGUAGE GRAMMAR
APPENDIX C: VHDL STANDARD PACKAGES
APPENDIX D: STD_LOGIC_1164 Package
APPENDIX E: STD_LOGIC_TEXTIO Package
APPENDIX F: STD_LOGIC_ARITH Package
APPENDIX G: STD_LOGIC_SIGNED
APPENDIX H: STD_LOGIC_UNSIGNED
APPENDIX I: math_real Package
INDEX