VLSI Synthesis of DSP Kernels: Algorithmic and Architectural Transformations

by Mahesh Mehendale, Sunil D. Sherlekar

Overview

A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space.
VLSI Synthesis of DSP Kernels presents the following:

Six different target implementation styles -

• Programmable DSP-based implementation;
• Programmable processors with no dedicated hardware multiplier;
• Implementation using hardware multiplier(s) and adder(s);
• Distributed Arithmetic (DA)-based implementation;
• Residue Number System (RNS)-based implementation; and
• Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels.

For each of the implementation styles, description and analysis of several algorithmic and architectural transformations aimed at one or more of reduced area, higher performance and low power;

Automated and semi-automated techniques for applying each of these transformations; and

Classification of the transformations based on the properties that they exploit and their encapsulation in a design framework. A methodology that uses the framework to systematically explore the application of these transformations depending on the characteristics of the algorithm and the target implementation style.

VLSI Synthesis of DSP Kernels is essential reading for designers of both hardware- and software-based DSP systems, developers of IP modules for DSP applications, EDA tools developers, researchers and managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing.

Product Details

ISBN-13:	9781475733556
Publisher:	Springer-Verlag New York, LLC
Publication date:	04/17/2013
Sold by:	Barnes & Noble
Format:	eBook
File size:	11 MB
Note:	This product may take a few minutes to download.

Table of Contents

1. Introduction.- 2. Programmable DSP Based Implementation.- 3. Implementation Using Hardware Multiplier(s) and Adder(s).- 4. Distributed Arithmetic Based Implementation.- 5. Multiplier-Less Implementation.- 6. Implementation of Multiplication-Free Linear Transforms.- 7. Residue Number System Based Implementation.- 8. A Framework for Algorithmic and Architectural Transformations.- 9. Summary.- References.- Topic Index.- About the Authors.

Editorial Reviews

Two Indian scientists look at the inner loop or kernel of digital signal processing systems, which process in real time digital information in the form of text, data, speech, images, audio, and video. Though there is a wide variety of such systems, they say, their kernels share the weighted-sum class of computation, and they present several algorithmic and architectural transformations to optimize weighted-sum-based kernels over the area-delay-power space. The transformations address implementation technologies that offer varying degrees of programmability and therefore flexibility ranging from software programmable processors to customized hardwired solutions using standard-cell or gate-array based ASICs. Annotation c. Book News, Inc., Portland, OR (booknews.com)

From the reviews:

"This book is devoted to describing the extremely fruitful ‘marriage’ between digital signal processing (DSP) and integrated circuit technology. … The present book is a generous and most qualified offer to all developers, either researchers or managers interested in VLSI and DSP, but especially to practicing system designers involved in both hardware and software optimal implementation of DSP kernels." (Neculai Curteanu, Zentralblatt MATH, Vol. 1050, 2005)

From the Publisher